What is a TLB, and why is it important?
Interview preparation resource from Gate Smashers.
A Translation Lookaside Buffer is a small, fast hardware cache that stores recently used virtual-to-physical address translations, avoiding a page-table walk on most memory accesses.
Every ordinary load or store uses a virtual address. Without a cached translation, the processor may need several additional memory accesses to walk a multilevel page table before it can reach the requested data. A TLB hit supplies the frame number and permission bits quickly.
A TLB miss means the translation was not cached; it does not necessarily mean the page is absent from RAM. Hardware or the operating system can fill the TLB from a valid page-table entry. Only an invalid or non-resident mapping that requires OS handling becomes a page fault.
Without a TLB, every memory reference could require one access to read the page-table entry and another to access the actual data. A TLB hit avoids that extra lookup, which is why its hit rate has a large effect on effective memory-access time.